The present invention relates to a semiconductor integrated circuit device, and to a technology effective for application to an input circuit of a semiconductor integrated circuit device, which is supplied with an input signal of small amplitude.
A differential input circuit has generally been used for an input circuit which receives an input signal of small amplitude therein and needs to operate at high speed. However, a problem arises in that when an input voltage Vin becomes low like Vin less than 2xc3x97Vth (threshold voltages of differential MOSFETs and current source MOSFET), a current of the current source MOSFET provided at common sources of the differential MOSFETs decreases and hence a normal operation cannot be carried out.
The inventors of the present application have focused attention on the rail to rail (rail to rail is a trademark of US Motorola, Inc.) circuit capable of operation even if an input signal is shifted to a source or power supply voltage or a circuit ground potential. FIG. 13 shows a circuit diagram of a rail to rail circuit discussed prior to the present invention. The present circuit needs bias P1, P2, N1, N2, and DCP and DCN. Considering process variations in devices, e.g., variations in mutual conductance ratio between P channel MOSFETs and N channel MOSFETs, and a shift in input voltage Vin, it is difficult to use the present circuit as a small-amplitude and high-speed input circuit as it is.
A circuit diagram of a self-bias type rail to rail circuit, which has been proposed by U.S. Pat. No. 4,958,133, is shown in FIG. 14. Further, an example in which a rail to rail circuit is used in an op amplifier, has been shown in Magazine xe2x80x9cTransistor Technologyxe2x80x9d, March 2001, pp. 201. Since these circuits are slow in signal transfer rate even if they can be used as op amplifiers, these circuits are unfit for an input circuit for inputting an address signal a clock signal and various control signals employed in a static RAM (Random Access Memory) which calls for a high-speed operation.
An object of the present invention is to provide a semiconductor integrated circuit device equipped with an input circuit capable of stably performing a high-speed operation up to a low voltage. The above, other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
A summary of a typical one of the inventions disclosed in the present application will be described in brief as follows: A first differential MOSFET pair of first conductivity type whose gates are respectively connected to first input terminals, and a first current source MOSFET of first conductivity type which is provided at common sources of the first differential MOSFET pair and forms an operating current, constitute a first amplifying unit. A second differential MOSFET pair of second conductivity type whose gates are respectively connected to the pair of first input terminals and a second current source MOSFET of second conductivity type which is provided at common sources of the second differential MOSFET pair and forms an operating current, constitute a second amplifying unit. A first output unit including a first MOSFET pair of second conductivity type which supplies a current flowing through the first differential MOSFET pair, and a second output unit including a second MOSFET pair of first conductivity type which supplies a current flowing through the second differential MOSFET pair, are provided to constitute an amplifier circuit. A circuit similar to such an amplifier circuit is used to constitute a device circuit. A pair of output terminals thereof is connected in common to form a bias voltage corresponding to a middle point. Such a voltage is supplied to the gates of the first and second current source MOSFETs of the amplifier circuit, the gates of the first and second MOSFETs thereof, and the gates of the corresponding current source MOSFET and MOSFET of the bias circuit.